One or more aspects of the invention relate generally to a method for generating TOD (time-of-day) values. One or more further aspects relate to a TOD synchronization system, a computing system, a data processing program, and a computer program product.
Today, computers or computing systems may include a plurality of processors, each of which is capable of executing one or more programs to digitally process a set of instructions as part of a computer program. Certain programs require exact time information for proper performance. This time information is particularly called time-of-day (“TOD”). In particular, a synchronization of monotonically increasing timestamps is important. It is to be avoided that different processors may generate non-monotonically TOD values. Sometimes recorded TOD values are required by software applications, e.g., full recording financial transactions. E.g., TOD clock records are commonly used to prevent financial transactions from being executed simultaneously multiple times against the same funds.
Thus, the software relies on the TOD to be unique and strictly monotonically increasing. E.g., in the S/390 architecture, an instruction called “STORE CLOCK” or “STCK” may be used to record a TOD in a 64-bit (eight byte) field. For uniqueness reasons of the TOD value across a multiprocessor system, the low n bits may be replaced by a constant unique CPU (central processing unit) number. A pulse may be distributed synchronously through the entire multiprocessor system, such that bit 64-n of a counter may be increased. In a 128 way multiprocessor system, seven bits are required to differentiate their 128 CPUs of the multiprocessor system. Thus, 64−7 bits are left for the counter, resulting in bits 0:56, speak, zero to 56. When a CPU reads the TOD it “sees” the current value of the TOD on bits 0:56 and the unique CPU number on bits 57:63, wherein the most significant bit is bit zero. A subsequent read may be blocked until the time pulse has increased bit 56 of the TOD counter. This ensures (a) uniqueness of processor identifiers across the entire processing system (every CPU uses a different bit combination of the bits 57:63), and (b) it may ensure a monotonically increase of the TOD values within each CPU.
However, the increasing number of processors in multiprocessor systems requires an increasing number of bits for identifying a specific CPU. Thus, the remaining bits available for the TOD counter decrease if the 64 bits in total remain unchanged. This means that the accuracy of the TOD counter—because of the reduced number of available bits for the TOD counter—is decreasing. In addition to that the clock speed of the individual processors may be increased. This situation may lead to a conflict of TOD values generated by different processors of the multiprocessor system—the TOD may no longer monotonically be increased.
The following situation may point to the increasing problem: Both, CPU A and B, receive regular TOD impulses. CPU B executes a STCK at time T1, and is writing a TOD value to a memory external to both CPUs, e.g., a shared cache. If shortly after T1, CPU A also executes a STCK instruction, its TOD value may be lower than the value that has been written to the shared memory by CPU B because of the unique CPU number stored in bits 57:63 of the TOD value. The identifier of CPU B may have a lower number than CPU A so that the TOD value of CPU B may be lower even if bit 56 (see above) is identical for both CPUs. This would lead to a non-monotonically increasing TOD of the multiprocessor system, which is to be avoided. However, this may only happen if the time required to transport a TOD value from one CPU to another is shorter than the precision of the TOD counter in a CPU. Now, this counter has a decreasing number of bits available, as discussed above. Hence, TOD value conflicts may arise.
There are some disclosures related to methods for generating TOD values.
Document U.S. Pat. No. 7,681,064 B2, which is hereby incorporated herein by reference in its entirety, discloses a system, a method and a computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepping to a common oscillator. The method includes computing a TOD-clock offset value to be added to a physical clock-value to obtain a logical TOD clock-value, wherein the logical TOD clock-value is adjusted without adjusting a stepping rate of the oscillator.